In an analog domain of a baseband sampling digital communication receiver, a radio frequency (RF) or intermediate frequency (IF) signal is down-converted into a baseband signal. The baseband signal is then converted into a digital signal by an analog-to-digital converter (ADC). Under such circumstances, the signal will be split into an in-phase (I) signal and a quadrature (Q) signal by a local oscillator using two sine waves with the same gain but a phase shift of 90 degrees (specifically, a sine wave and a cosine wave) when the signal is down-converted to a baseband signal.
However, such procedures are executed in the analog domain, therefore errors are possible to be generated. Especially, gain errors and phase errors may be generated between the sine wave and cosine wave used in the down conversion. Such errors may severely influence the performance of the receiver. This is so called IQ imbalance. In general, the gain error is about 1˜5%, and the phase error is about 1˜5 degrees. At this time, the IQ imbalance causes a gain imbalance between I and Q paths, or causes crosstalk interference from either the I or Q signals to the other one and vice versa. When the interference is great, the performance of the receiver will be significantly degraded.
Especially in an orthogonal frequency division multiplexing receiver, sub-carrier data located at symmetric positions of positive and negative frequencies interfere each other due to the affect of the IQ imbalance, and thereby resulting in a serious problem of poor performance in the IQ imbalance level.
Nowadays, there are several techniques and method for the IQ imbalance estimation and compensation. In particularly, the estimation techniques include a data aided offline estimator, a real-time frequency domain estimator, a real-time time domain estimator and many others.
The data aided offline estimator utilizes a method in which a prediction signal of a sine wave is inputted to the receiver so as to estimate the IQ imbalance. The aforesaid method can achieve high accuracy but with a problem, such that in responding to the variation due to an RF element or RF chip, it is necessary to calibrate the element or chip.
The real-time frequency domain estimator utilizes the fact that the positive frequency component and negative frequency component interfere with each other at symmetric positions in the frequency domain so as to estimate the interference quantity. Accordingly, an IQ imbalance compensator generally compensates the estimated interference in frequency domain. The compensation can be carried out in time domain. However, under such circumstances, complicated calculations such as square root, arcsine and so on are necessary to implement the gain and phase errors by hard wired logic. Using the real-time frequency domain estimator is the main means for the orthogonal frequency division multiplexing (OFDM) receiver. However, it is more complicated to realize it. This is because normal orthogonal frequency division multiplexing symbol data and the data obtained by symmetrically exchanging the positive and negative frequency data with respect to DC, are required when estimation is executed in frequency domain. Therefore, an additional memory having a capacity which is the length of the OFDM symbol is required, and an additional delay with a size of the OFDM symbol is also required.
Currently, the real-time time domain estimator utilizes the following method: directly calculating the gain and phase errors, and directly calculating compensating values for crosstalk and quadrature paths. However, there are disadvantages, huge data must be used, otherwise, the use of such a estimator will be problematic. In addition, complicated calculations such as division and square root are required when it is designed with hard wired logic.
The present invention relates to a real-time time domain estimation method and provides a digital phase-locked loop (PLL) estimator. The gain and phase errors or compensation gain values of the crosstalk and quadrature paths and an IQ imbalance compensation value are not directly calculated. Instead, a proper error detector is used to make the residual crosstalk as well as a mismatch between the residual quadrature and in-phase gain become 0. In addition, the gain values required for crosstalk and quadrature paths are tracked via a feedback loop.
Further, the present invention provides a method, in which time domain compensator has to co-work with the digital PLL real-time time domain estimator.